diff options
author | Pixel <> | 2001-04-16 15:06:19 +0000 |
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committer | Pixel <> | 2001-04-16 15:06:19 +0000 |
commit | 3953a2906211a6c0007079dcafe66aa372ab33d1 (patch) | |
tree | 1a6e3451e11ac814213092dc45c9d20e6d7e45a3 /lib/simulator.c | |
parent | b5faaeaf68d2d48a8afc99d02775ed13ab1c0978 (diff) |
Simulator
Diffstat (limited to 'lib/simulator.c')
-rw-r--r-- | lib/simulator.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/lib/simulator.c b/lib/simulator.c index 4373d0d..b046129 100644 --- a/lib/simulator.c +++ b/lib/simulator.c @@ -76,7 +76,12 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) fpu(Opcode(instruction)); } else { switch (Opcode(instruction)) { - case (0 || 1 || 2 || 3 || 4 || 5):{ + case 0: + case 1: + case 2: + case 3: + case 4: + case 5: /* ALU */ champ_registre_resultat = Champ1(instruction); /* Champ du registre dans lequel va etre stocké le résultat */ val1 = LireRegistre(Champ2(instruction)); /* Premier entier qui va etre utilisé dans l'opération */ @@ -141,8 +146,7 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) } EcrireRegistre(champ_registre_resultat, resultat); /* On écrit le résultat dans le registre de sortie */ break; - } - case 8:{ /* MOV */ + case 8: /* MOV */ if (ValeurBit(Extension(instruction), 4) == 1) { /* MOV conditionnel */ if (ValeurBit(Extension(instruction), 5) == 0) { /* Test normal */ switch (champ(Extension(instruction) >> 2, 4)) { /* teste les bits 2 et 3 */ @@ -207,13 +211,13 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) } fin: break; - } - case 9:{ /* NOP */ + + case 9: /* NOP */ /* Instruction nulle */ break; - } + case 10: /* J[cond] */ - case 11:{ + case 11: int test1, test2; switch (champ(Extension(instruction), 4)) { @@ -267,9 +271,9 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) EcrireRegistrePC(tmp); } break; - } - case (12): /* JMP */ - case (13): + + case 12: /* JMP */ + case 13: if (ValeurBit(Extension(instruction), 0) == 0) { /* RET */ EcrireRegistreSP(AdditionNonSigne(LireRegistreSP(),Champ1(instruction))); @@ -292,7 +296,7 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) } } break; - case 14:{ /* PUSH */ + case 14: /* PUSH */ Uint32 val; /* valeur qui va etre stockée */ if (ValeurBit(Extension(instruction), 0) == 0) @@ -304,24 +308,20 @@ void DecodeExec(Uint32 instruction, Uint32 entrypoint) ST(LireRegistreSP(), val); EcrireRegistreSP(SoustractionNonSigne(LireRegistreSP(), 1)); break; - } - case 15:{ /* POP */ + case 15: /* POP */ EcrireRegistreSP(AdditionNonSigne(LireRegistreSP(), 1)); EcrireRegistre(Champ1(instruction), LD(LireRegistreSP())); break; - } - case 127:{ /* HALT-RESET */ + case 127: /* HALT-RESET */ if (ValeurBit(Extension(instruction), 0)) exit(0); /* Halt *//* *******************FIXMI********************* */ else ResetRegistres(); Traitement(entrypoint); /* Reset *//* ************FIXMI************** */ break; - } - default:{ + default: exception(1, _("DecodeExec: Invalid Opcode")); - } } } } |