OUAAAAAAAAAAAAAAAAA

5 files changed, 38 insertions, 34 deletions

diff --git a/lib/assembler.c b/lib/assembler.c
index 64eafb9..8e9452e 100644
--- a/lib/assembler.c
+++ b/lib/assembler.c
@@ -1650,6 +1650,7 @@ void asm_eol(void)
 						t->pattern = NULL;
 						t->symbol = NULL;
 						InsererVarDansTab(&it, CreerElement(instr->names[i], t));
+						fprintf(stderr, "On a %s qui vaut %i\n", instr->names[i], e_current->index);
 						evaluate_pattern(&it, e_current);
 						break;
 					default:
@@ -1675,6 +1676,7 @@ void asm_eol(void)
 						t->pattern = NULL;
 						t->symbol = NULL;
 					}
+					fprintf(stderr, "On a %s qui vaut %i\n", instr->implicits[i], t->avalue);				
 					InsererVarDansTab(&it, CreerElement(instr->implicits[i], t));
 					break;
 				case 1:	/* type prédéfinit */
@@ -1687,6 +1689,7 @@ void asm_eol(void)
 					t->child = t->next = NULL;
 					t->pattern = NULL;
 					t->symbol = NULL;
+					fprintf(stderr, "On a %s qui vaut %i\n", instr->implicits[i], t->avalue);				
 					InsererVarDansTab(&it, CreerElement(instr->implicits[i], t));
 					break;
 				case 2:	/* type valeur */
@@ -1696,6 +1699,7 @@ void asm_eol(void)
 					t->child = t->next = NULL;
 					t->pattern = NULL;
 					t->symbol = NULL;
+					fprintf(stderr, "On a %s qui vaut %i\n", instr->implicits[i], t->avalue);				
 					InsererVarDansTab(&it, CreerElement(instr->implicits[i], t));
 					break;
 				}
diff --git a/lib/instructions.txt b/lib/instructions.txt
index c9717cf..8548887 100644
--- a/lib/instructions.txt
+++ b/lib/instructions.txt
@@ -33,6 +33,10 @@ I:ADD c1=.Pr,c2=.Pr,c3=.Pr;op=0x0;e=0x0
 I:ADD c1=.Pr,c2=.Pr,.I=.C;op=0x0;e=0x1
 I:ADU c1=.Pr,c2=.Pr,c3=.Pr;op=0x0;e=0x2
 I:ADU c1=.Pr,c2=.Pr,.I=.C;op=0x0;e=0x3
+I:ADD c2=.Pr,c3=.Pr;op=0x0;e=0x0;c1=c2
+I:ADD c2=.Pr,.I=.C;op=0x0;e=0x1;c1=c2
+I:ADU c2=.Pr,c3=.Pr;op=0x0;c1=c2;e=0x2
+I:ADU c2=.Pr,.I=.C;op=0x0;c1=c2;e=0x3
 
 p:ADS=ADD
 
@@ -40,6 +44,10 @@ I:SUB c1=.Pr,c2=.Pr,c3=.Pr;op=0x1;e=0x0
 I:SUB c1=.Pr,c2=.Pr,.I=.C;op=0x1;e=0x1
 I:SBU c1=.Pr,c2=.Pr,c3=.Pr;op=0x1;e=0x2
 I:SBU c1=.Pr,c2=.Pr,.I=.C;op=0x1;e=0x3
+I:SUB c2=.Pr,c3=.Pr;op=0x1;e=0x0;c1=c2
+I:SUB c2=.Pr,.I=.C;op=0x1;e=0x1;c1=c2
+I:SBU c2=.Pr,c3=.Pr;op=0x1;e=0x2;c1=c2
+I:SBU c2=.Pr,.I=.C;op=0x1;e=0x3;c1=c2
 
 p:SBS=SUB
 
@@ -64,11 +72,11 @@ I:SHR c1=.Pr,c2=.Pr,.I=.C;op=0x7;e=0x1
 
 # Transferts
 
-I:MOV c1=.Pr,rm=.Pm;op=8;e=0;c2=.Fa;c3=regop
-I:MOV c1=.Pr,c3=.Pr;op=8;e=0;c2=0
-I:MOV c1=.Pr,.I=.C;op=8;e=1
-I:MOV rm=.Pm,c2=.Pr;op=8;e=2;c1=.Fa;c3=regop
-I:MOV rm=.Pm,.I=.C;op=8;e=3;c1=.Fa;c3=regop
+I:MOV c2=.Pr,rm=.Pm;op=8;e=2;c1=.Fa;c3=regop
+I:MOV c2=.Pr,c3=.Pr;op=8;e=2
+I:MOV c3=.Pr,.I=.C;op=8;e=1
+I:MOV rm=.Pm,c2=.Pr;op=8;e=0;c1=.Fa;c3=regop
+I:MOV rm=.Pm,.I=.C;op=8;e=1;c1=.Fa;c3=regop
 
 p:MV=MOV
 
@@ -111,7 +119,7 @@ I:JNZ .I=.O;op=0xa;e=0x34
 I:JNS .I=.O;op=0xa;e=0x38
 I:JNP .I=.O;op=0xa;e=0x3c
 
-I:JMP .I=.O;op=0x0c;e=0x2
+I:JMP .I=.O;op=0xa;e=0x0
 
 I:HALT;op=0x7f
 I:RESET;op=0x7f;e=1
diff --git a/lib/linker.c b/lib/linker.c
index 0be4cfc..81fc507 100644
--- a/lib/linker.c
+++ b/lib/linker.c
@@ -238,27 +238,29 @@ static void dumprelog(FILE * f)
 					exception(1, _("Internal error"));
 					break;
 				}
+				fprintf(stderr, "Relogement effectué sur %i, de %i octets pour le symbole %s\n", s->offset, decal, s->name);
 				objects[s->objindex]->text[s->offset] += decal;
 				writeword(objects[s->objindex]->textstart + s->offset, f);
 				break;
 			case 3:	/* data */
 				switch (t->type) {
 				case 0:
-					objects[s->objindex]->data[s->offset] +=
+					decal = 	
 						objects[t->objindex]->textstart + t->offset;
 					break;
 				case 2:
-					objects[s->objindex]->data[s->offset] +=
+					decal = 
 						textsize + objects[t->objindex]->datastart + t->offset;
 					break;
 				case 4:
-					objects[s->objindex]->data[s->offset] +=
+					decal = 
 						textsize + datasize + objects[t->objindex]->bssstart + t->offset;
 					break;
 				default:
 					exception(1, _("Internal error"));
 					break;
 				}
+				objects[s->objindex]->data[s->offset] += decal;
 				writeword(textsize + objects[s->objindex]->datastart + s->offset, f);
 				break;
 			default:
diff --git a/lib/memoire.c b/lib/memoire.c
index eb6dadc..264009c 100644
--- a/lib/memoire.c
+++ b/lib/memoire.c
@@ -126,4 +126,5 @@ void ST(Uint32 offset, Uint32 valeur)
 			memoire_principale[offset] = valeur;
 		break;
 	}
+	fflush(stdout);
 }
diff --git a/lib/simulator.c b/lib/simulator.c
index 802587b..16cc2ef 100644
--- a/lib/simulator.c
+++ b/lib/simulator.c
@@ -57,8 +57,8 @@ static Uint32 readword(FILE * f)
 Uint32 Adresse(Uint32 u, Uint32 instruction)
 {
 	Uint32 tmp;
-
-	switch (champ(u, 2)) {
+	
+	switch (champ(u, 4)) {
 	case 0:
 		exception(1, _("Adresse: Call With Invalid r/m Field State ( r/m=00 )"));
 		return (0);
@@ -101,7 +101,6 @@ void DecodeExec(Uint32 instruction)
 	
 	
 	if (Opcode(instruction) & 0x80) {
-		fprintf(stderr, "Opcode FPU\n");
 		fpu(Opcode(instruction));
 	} else {
 		switch (Opcode(instruction)) {
@@ -113,7 +112,6 @@ void DecodeExec(Uint32 instruction)
 		case 5:
 		case 6:
 		case 7:
-			fprintf(stderr, "Opcode ALU\n");
 			/* ALU */
 			champ_registre_resultat = Champ1(instruction);	/* Champ du registre dans lequel va etre stocké le résultat */
 			val1 = LireRegistre(Champ2(instruction));	/* Premier entier qui va etre utilisé dans l'opération */
@@ -188,7 +186,6 @@ void DecodeExec(Uint32 instruction)
 			}
 			break;
 		case 8:	/*  MOV  */
-			fprintf(stderr, "Opcode MOV\n");
 			if (ValeurBit(Extension(instruction), 4) == 1) {	/* MOV conditionnel  */
 				if (ValeurBit(Extension(instruction), 5) == 0) {	/* Test normal */
 					switch (champ(Extension(instruction) >> 2, 4)) {	/* teste les bits 2 et 3 */
@@ -224,38 +221,28 @@ void DecodeExec(Uint32 instruction)
 			}
 			/* Pas de MOV conditionnel */
 			if (ValeurBit(Extension(instruction), 1) == 0) {	/* Mov arg1 arg2 */
-				fprintf(stderr, "MOV arg1, arg2\n");
 				if (ValeurBit(Extension(instruction), 0) == 0) {	/* arg2 = reg */
-					fprintf(stderr, "arg2 = reg (%i)\n", Champ2(instruction));
 					if (champ(Champ1(instruction), 2) == 0) {	/* r/m de arg1 = 0 */
-						fprintf(stderr, "arg1 = reg (%i)\n", Champ3(instruction));
 						EcrireRegistre(Champ3(instruction), LireRegistre(Champ2(instruction)));
 					} else {
-						fprintf(stderr, "arg1 = adresse\n");
 						ST(Adresse(Champ1(instruction), instruction),
 						   LireRegistre(Champ2(instruction)));
 					}
 				} else {	/* arg2 = imm32 */
-					fprintf(stderr, "arg2 = imm (%i)\n", LireInstruction());
 					if (champ(Champ1(instruction), 2) == 0) {	/* r/m de arg1 = 0 */
-						fprintf(stderr, "arg1 = reg (%i)\n", Champ3(instruction));
 						EcrireRegistre(Champ3(instruction), LireInstruction());
 						IncrementeCompteurOrdinal();
 					} else {
-						fprintf(stderr, "arg1 = adresse\n");
-						ST(Adresse(Champ1(instruction), instruction), LireInstruction());
+						val = Adresse(Champ1(instruction), instruction);
+						ST(val, LireInstruction());
 						IncrementeCompteurOrdinal();
 					}
 				}
-			} else {
-				fprintf(stderr, "MOV arg2, arg1\n");
+			} else {							/* mov arg2, arg1 */
 				if (ValeurBit(Extension(instruction), 0) == 0) {	/* arg2 = reg */
-					fprintf(stderr, "arg2 = reg (%i)\n", Champ2(instruction));
 					if (champ(Champ1(instruction), 2) == 0) {	/* r/m de arg1 = 0 */
-						fprintf(stderr, "arg1 = reg (%i)\n", Champ3(instruction));
 						EcrireRegistre(Champ2(instruction), LireRegistre(Champ3(instruction)));
 					} else {
-						fprintf(stderr, "arg1 = addresse\n");
 						EcrireRegistre(Champ2(instruction),
 							       LD(Adresse(Champ1(instruction), instruction)));
 					}
@@ -328,6 +315,8 @@ void DecodeExec(Uint32 instruction)
 					tmp += LireRegistrePC();
 				}
 				EcrireRegistrePC(tmp);
+			} else {
+				IncrementeCompteurOrdinal();
 			}
 			break;
 
@@ -372,7 +361,7 @@ void DecodeExec(Uint32 instruction)
 
 			break;
 		case 127:	/*  HALT-RESET  */
-			if (ValeurBit(Extension(instruction), 0)) {
+			if (ValeurBit(Extension(instruction), 0) == 0) {
 				HasToRun = 0;	/* Halt */
 			} else {
 				HasToReset = 1;	/* Reset */
@@ -390,16 +379,16 @@ void AfficheReg(void)		//  affiche reg
 	int i, j;
 
 	for (i = 0; i <= 3; i++) {
-		for (j = 1; j <= 8; j++) {
+		for (j = 0; j < 8; j++) {
 			fprintf(stderr, "   R%02d   ", (i * 8 + j));
 		}
 		fprintf(stderr, "\n");
-		for (j = 1; j <= 8; j++) {
-			fprintf(stderr, "%08lX ", (registre[i * 8 + j - 1]));
+		for (j = 0; j < 8; j++) {
+			fprintf(stderr, "%08lX ", (registre[i * 8 + j]));
 		}
 		fprintf(stderr, "\n");
 	}
-	fprintf(stderr, "Rg: %08lX  | Rd: %08lX | Flag: %08lX | PC: %08lX\n\n", LireRegistreRG(), LireRegistreRD(),
+	fprintf(stderr, "Rg: %08lX  | Rd: %08lX | Flag: %08lX | PC: %08lX\n", LireRegistreRG(), LireRegistreRD(),
 	       LireRegistreFLAG(), LireRegistrePC());
 }
 
@@ -417,13 +406,13 @@ void Debogueur(void)
 		switch (fgetc(input)) {
 		case 'G':
 		case 'g':
-			fprintf(stderr, "Go\n");
+			fprintf(stderr, "Go\n\n");
 			debug = 0;
 			out = 1;
 			break;
 		case 'p':
 		case 'P':
-			fprintf(stderr, "Proceed\n");
+			fprintf(stderr, "Proceed\n\n");
 			out = 1;
 			break;
 		case 'R':