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diff --git a/lib/instructions.txt b/lib/instructions.txt
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-# Champ d'instructions général
-FI:c3,6;c2,6;c1,6;e,6;op,8
-
-# Champ d'adressage
-Fa:reserved,4;rm,2
-
-# Pattern des registres
-Pr:R0;R1;R2;R3;R4;R5;R6;R7;R8;R9;R10;R11;R12;R13;R14;R15;R16;R17;R18;R19;R20;R21;R22;R23;R24;R25;R26;R27;R28;R29;R30;R31;Rg;Rd;IP;Fl
-
-# Pattern des adressages
-# .O = Adresse absolue (relogée)
-# .O = Adresse relative à l'instruction en cours (ex: Label, Label + 2, __current__ + 4)
-Pm:regop=.Pr;.I=.O;[regop=.Pr;.I=.O[regop=.Pr
-
-# bits 3 - 2
-# ~~~~~~~~~~
-# 00 overflow
-# 01 zero
-# 10 sign
-# 11 parity
-
-# bits 5 - 4
-# ~~~~~~~~~~
-# 00 test1
-# 01 test1 || test2
-# 10 test1 && !test2
-# 11 test1 || !test2
-
-
-# Arithmetique
-
-I:ADD c1=.Pr,c2=.Pr,c3=.Pr;op=0x0;e=0x0
-I:ADD c1=.Pr,c2=.Pr,.I=.C;op=0x0;e=0x1
-I:ADU c1=.Pr,c2=.Pr,c3=.Pr;op=0x0;e=0x2
-I:ADU c1=.Pr,c2=.Pr,.I=.C;op=0x0;e=0x3
-I:ADD c2=.Pr,c3=.Pr;op=0x0;e=0x0;c1=c2
-I:ADD c2=.Pr,.I=.C;op=0x0;e=0x1;c1=c2
-I:ADU c2=.Pr,c3=.Pr;op=0x0;c1=c2;e=0x2
-I:ADU c2=.Pr,.I=.C;op=0x0;c1=c2;e=0x3
-
-p:ADS=ADD
-
-I:SUB c1=.Pr,c2=.Pr,c3=.Pr;op=0x1;e=0x0
-I:SUB c1=.Pr,c2=.Pr,.I=.C;op=0x1;e=0x1
-I:SBU c1=.Pr,c2=.Pr,c3=.Pr;op=0x1;e=0x2
-I:SBU c1=.Pr,c2=.Pr,.I=.C;op=0x1;e=0x3
-I:SUB c2=.Pr,c3=.Pr;op=0x1;e=0x0;c1=c2
-I:SUB c2=.Pr,.I=.C;op=0x1;e=0x1;c1=c2
-I:SBU c2=.Pr,c3=.Pr;op=0x1;e=0x2;c1=c2
-I:SBU c2=.Pr,.I=.C;op=0x1;e=0x3;c1=c2
-
-p:SBS=SUB
-
-I:MUL c2=.Pr,c3=.Pr;op=0x2;e=0x0
-I:MUL c2=.Pr,.I=.C;op=0x2;e=0x1
-
-I:DIV c2=.Pr,c3=.Pr;op=0x3;e=0x0
-I:DIV c2=.Pr,.I=.C;op=0x3;e=0x1
-
-I:AND c1=.Pr,c2=.Pr,c3=.Pr;op=0x4;e=0x0
-I:AND c1=.Pr,c2=.Pr,.I=.C;op=0x4;e=0x1
-
-I:OR c1=.Pr,c2=.Pr,c3=.Pr;op=0x5;e=0x0
-I:OR c1=.Pr,c2=.Pr,.I=.C;op=0x5;e=0x1
-
-I:SHL c1=.Pr,c2=.Pr,c3=.Pr;op=0x6;e=0x0
-I:SHL c1=.Pr,c2=.Pr,I=.C;op=0x6;e=0x1
-
-I:SHR c1=.Pr,c2=.Pr,c3=.Pr;op=0x7;e=0x0
-I:SHR c1=.Pr,c2=.Pr,.I=.C;op=0x7;e=0x1
-
-
-# Transferts
-
-I:MOV c2=.Pr,rm=.Pm;op=8;e=2;c1=.Fa;c3=regop
-I:MOV c2=.Pr,c3=.Pr;op=8;e=2
-I:MOV c3=.Pr,.I=.C;op=8;e=1
-I:MOV rm=.Pm,c2=.Pr;op=8;e=0;c1=.Fa;c3=regop
-I:MOV rm=.Pm,.I=.C;op=8;e=1;c1=.Fa;c3=regop
-
-p:MV=MOV
-
-
-# Misc1
-
-I:NOP;op=0x9
-
-
-# Branchements
-
-# bits 3 - 2
-# ~~~~~~~~~~
-# 00 overflow
-# 01 zero
-# 10 sign
-# 11 parity
-
-# bits 5 - 4
-# ~~~~~~~~~~
-# 00 test1
-# 01 test1 || test2 == !(!test1 && !test2)
-# 10 test1 && !test2 == !(!test1 || test2)
-# 11 test1 || !test2 == !(!test1 && test2)
-
-I:JE c1=.Pr,c2=.Pr,.I=.O;op=0xa;e=0x0
-I:JNE c1=.Pr,c2=.Pr,.I=.O;op=0xa;e=0x1
-I:JL c1=.Pr,c2=.Pr,.I=.O;op=0xa;e=0x2
-I:JLE c1=.Pr,c2=.Pr,.I=.O;op=0xa;e=0x3
-I:JG c2=.Pr,c1=.Pr,.I=.O;op=0xa;e=0x2
-I:JGE c2=.Pr,c1=.Pr,.I=.O;op=0xa;e=0x3
-
-I:JO .I=.O;op=0xa;e=0x10
-I:JZ .I=.O;op=0xa;e=0x14
-I:JS .I=.O;op=0xa;e=0x18
-I:JP .I=.O;op=0xa;e=0x1c
-
-I:JNO .I=.O;op=0xa;e=0x30
-I:JNZ .I=.O;op=0xa;e=0x34
-I:JNS .I=.O;op=0xa;e=0x38
-I:JNP .I=.O;op=0xa;e=0x3c
-
-I:JMP .I=.O;op=0xa;e=0x0
-
-I:HALT;op=0x7f
-I:RESET;op=0x7f;e=1
-
-I:RET;op=0xc
-I:RET c1=.C;op=0xc
-
-I:CALL .I=.O;op=0xc;e=3