From 3ca9b28c5b04220565c206bd73d9ebb48b64db3b Mon Sep 17 00:00:00 2001 From: Pixel Date: Wed, 2 Feb 2011 08:35:38 -0800 Subject: Making a sample code for the 'romfs' thingy. --- arch/Makefile | 1 + arch/arm/lpc17xx/handlers.c | 3 +++ 2 files changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/Makefile b/arch/Makefile index 7dab0ab..a326af1 100644 --- a/arch/Makefile +++ b/arch/Makefile @@ -8,6 +8,7 @@ include $(ROOTDIR)/FreeRTOS/config.mk include $(ROOTDIR)/os/config.mk ifeq ($(CPU),arm) +TARGET_SRCS += arm/src/angel.s ifeq ($(CPU_FLAVOR),lpc1768) TARGET_SRCS += arm/lpc17xx/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c arm/lpc17xx/Core/CM3/CoreSupport/core_cm3.c TARGET_SRCS += $(addprefix arm/lpc17xx/Drivers/source/lpc17xx_, spi.c rit.c exti.c wdt.c uart.c dac.c rtc.c i2s.c pwm.c mcpwm.c pinsel.c nvic.c emac.c systick.c ssp.c can.c gpio.c libcfg_default.c i2c.c timer.c gpdma.c clkpwr.c qei.c adc.c) diff --git a/arch/arm/lpc17xx/handlers.c b/arch/arm/lpc17xx/handlers.c index a421aff..50b02e8 100644 --- a/arch/arm/lpc17xx/handlers.c +++ b/arch/arm/lpc17xx/handlers.c @@ -35,6 +35,9 @@ void general_C_handler(enum FaultType fault, struct fault_data_extra_t * fault_d uint8_t MMFSR = SCB->CFSR & 0xff; uint8_t BFSR = (SCB->CFSR >> 8) & 0xff; uint16_t UFSR = (SCB->CFSR >> 16) & 0xffff; + (void) MMFSR; + (void) BFSR; + (void) UFSR; struct fault_data_cpu_t * fault_data_cpu = (struct fault_data_cpu_t *) ((eflags & 4) ? (void *) __get_PSP() : (void *) (fault_data_extra + 1)); DBGOUT("***FAULT***\r\neflags = 0x0%x\r\nPSP = %p\r\nType: ", eflags, __get_PSP()); switch (fault) { -- cgit v1.2.3