From ee97e7d3e576b653ef6694b7f3bcae9045620cca Mon Sep 17 00:00:00 2001
From: "Nicolas \"Pixel\" Noble" <pixel@nobis-crew.org>
Date: Thu, 27 Jan 2011 02:01:44 +0100
Subject: Adding slightly better exception handlers.

---
 arch/Makefile               |  2 +-
 arch/arm/lpc17xx/handlers.c | 50 +++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/lpc17xx/startup.s  | 30 ---------------------------
 3 files changed, 51 insertions(+), 31 deletions(-)
 create mode 100644 arch/arm/lpc17xx/handlers.c

(limited to 'arch')

diff --git a/arch/Makefile b/arch/Makefile
index 708476b..efab9bb 100644
--- a/arch/Makefile
+++ b/arch/Makefile
@@ -11,7 +11,7 @@ ifeq ($(CPU),arm)
 ifeq ($(CPU_FLAVOR),lpc1768)
 TARGET_SRCS += arm/lpc17xx/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c arm/lpc17xx/Core/CM3/CoreSupport/core_cm3.c
 TARGET_SRCS += $(addprefix arm/lpc17xx/Drivers/source/lpc17xx_, spi.c rit.c exti.c wdt.c uart.c dac.c rtc.c i2s.c pwm.c mcpwm.c pinsel.c nvic.c emac.c systick.c ssp.c can.c gpio.c libcfg_default.c i2c.c timer.c gpdma.c clkpwr.c qei.c adc.c)
-TARGET_SRCS += arm/lpc17xx/startup.s arm/lpc17xx/hooks.c arm/lpc17xx/Drivers/source/debug_frmwrk.c arm/lpc17xx/mbed/BoardConsole.c
+TARGET_SRCS += arm/lpc17xx/startup.s arm/lpc17xx/handlers.c arm/lpc17xx/hooks.c arm/lpc17xx/Drivers/source/debug_frmwrk.c arm/lpc17xx/mbed/BoardConsole.c
 endif
 endif
 
diff --git a/arch/arm/lpc17xx/handlers.c b/arch/arm/lpc17xx/handlers.c
new file mode 100644
index 0000000..444c0c1
--- /dev/null
+++ b/arch/arm/lpc17xx/handlers.c
@@ -0,0 +1,50 @@
+#include <osdebug.h>
+#include "LPC17xx.h"
+
+enum FaultType {
+    NMI, HardFault, MemManage, BusFault, UsageFault,
+};
+
+static inline void traceme() {
+    unsigned int i;
+    void * frame, * pc;
+    
+    i = 0;
+    frame = __builtin_frame_address(i);
+    pc = frame ? __builtin_return_address(i) : 0;
+    DBGOUT("lv%u; PC = %p, frame = %p\r\n", i, pc, frame);
+}
+
+static int general_Handler(enum FaultType fault) {
+    DBGOUT("***FAULT***\r\n");
+    
+    traceme();
+    
+    switch (fault) {
+    case NMI:
+        DBGOUT("NMI\r\n");
+        break;
+    case HardFault:
+        DBGOUT("HardFault\r\nHFSR: %p\r\n", SCB->HFSR);
+        break;
+    case MemManage:
+        DBGOUT("MemManage\r\nCSFR: %p\r\nMMFAR: %p\r\n", SCB->CFSR, SCB->MMFAR);
+        break;
+    case BusFault:
+        DBGOUT("BusFault\r\nCFSR: %p\r\nBFAR: %p\r\n", SCB->CFSR, SCB->BFAR);
+        break;
+    case UsageFault:
+        DBGOUT("UsageFault\r\nCFSR: %p\r\nBFAR: %p\r\n", SCB->CFSR, SCB->BFAR);
+        break;
+    }
+    
+    while(1);
+    
+    return 0;
+}
+
+int NMI_Handler() { return general_Handler(NMI); }
+int HardFault_Handler() { return general_Handler(HardFault); }
+int MemManage_Handler() { return general_Handler(MemManage); }
+int BusFault_Handler() { return general_Handler(BusFault); }
+int UsageFault_Handler() { return general_Handler(UsageFault); }
diff --git a/arch/arm/lpc17xx/startup.s b/arch/arm/lpc17xx/startup.s
index 6aced2c..6f41389 100644
--- a/arch/arm/lpc17xx/startup.s
+++ b/arch/arm/lpc17xx/startup.s
@@ -158,36 +158,6 @@ __cs3_reset_cortex_m:
 
 /* Exception Handlers */
 
-    .weak   NMI_Handler
-    .type   NMI_Handler, %function
-NMI_Handler:
-    B       .
-    .size   NMI_Handler, . - NMI_Handler
-
-    .weak   HardFault_Handler
-    .type   HardFault_Handler, %function
-HardFault_Handler:
-    B       .
-    .size   HardFault_Handler, . - HardFault_Handler
-
-    .weak   MemManage_Handler
-    .type   MemManage_Handler, %function
-MemManage_Handler:
-    B       .
-    .size   MemManage_Handler, . - MemManage_Handler
-
-    .weak   BusFault_Handler
-    .type   BusFault_Handler, %function
-BusFault_Handler:
-    B       .
-    .size   BusFault_Handler, . - BusFault_Handler
-
-    .weak   UsageFault_Handler
-    .type   UsageFault_Handler, %function
-UsageFault_Handler:
-    B       .
-    .size   UsageFault_Handler, . - UsageFault_Handler
-
     .weak   SVC_Handler
     .type   SVC_Handler, %function
 SVC_Handler:
-- 
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