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-rw-r--r--include/registre.h5
-rw-r--r--include/simulator.h16
-rw-r--r--lib/registre.c16
-rw-r--r--lib/simulator.c300
4 files changed, 207 insertions, 130 deletions
diff --git a/include/registre.h b/include/registre.h
index f5d8b5b..19b817b 100644
--- a/include/registre.h
+++ b/include/registre.h
@@ -7,13 +7,13 @@ Uint32 LireRegistreRG(void);
Uint32 LireRegistreRD(void);
Uint32 LireRegistrePC(void);
Uint32 LireRegistreFLAG(void);
-Uint32 LireRegistrePP(void);
+Uint32 LireRegistreSP(void);
void EcrireRegistreRG(Uint32 val);
void EcrireRegistreRD(Uint32 val);
void EcrireRegistrePC(Uint32 val);
void EcrireRegistreFLAG(Uint32 val);
-void EcrireRegistrePP(Uint32 val);
+void EcrireRegistreSP(Uint32 val);
Uint32 LireRegistre(Uint32 champ_registre);
@@ -33,4 +33,5 @@ void ResetOverflow(void);
void ResetZero(void);
void ResetSign(void);
void ResetParity(void);
+void ResetRegistres(void);
#endif \ No newline at end of file
diff --git a/include/simulator.h b/include/simulator.h
index e2df994..852fb7d 100644
--- a/include/simulator.h
+++ b/include/simulator.h
@@ -8,14 +8,22 @@
#define REG_RD 33 /* Numero du registre Rd */
#define REG_PC 34 /* Numero du registre PC */
#define REG_FLAG 35 /* Numero du registre de flags */
-#define REG_PUSHPOP 36 /* Numero du registre de Push-Pop */
-#define ADD_PP (TAILLE_MEMOIRE-1) /* Emplacement de la pile */
+#define REG_STACKPTR 36 /* Numero du registre de Push-Pop */
+#define ADD_SP (TAILLE_MEMOIRE-1) /* Emplacement de la pile */
#include "types.h"
Uint32 memoire_principale[TAILLE_MEMOIRE];
Uint32 registre[NB_REGISTRES_PHYSIQUES]; /* Registres classiques */
-Uint32 Err_Mem; /* en cas d'erreur l/e en mémoire principale */
-Uint32 Err_Reg; /* en cas d'erreur l/e dans un registre */
+Uint32 LireInstruction(void);
+void IncrementeCompteurOrdinal(void);
+Uint32 Adresse(Uint32 u, Uint32 instruction);
+void Initialisation(void);
+void DecodeExec(Uint32 instruction, Uint32 entrypoint);
+void Traitement(Uint32 entrypoint);
+void AfficheReg(void);
+void Debogueur(void);
+
+
#endif
diff --git a/lib/registre.c b/lib/registre.c
index e77e9c1..4edb885 100644
--- a/lib/registre.c
+++ b/lib/registre.c
@@ -35,9 +35,9 @@ Uint32 LireRegistreFLAG(void)
return (registre[REG_FLAG]);
}
-Uint32 LireRegistrePP(void)
+Uint32 LireRegistreSP(void)
{
- return (registre[REG_PUSHPOP]);
+ return (registre[REG_STACKPTR]);
}
void EcrireRegistreRG(Uint32 val)
@@ -60,9 +60,9 @@ void EcrireRegistreFLAG(Uint32 val)
registre[REG_FLAG] = val;
}
-void EcrireRegistrePP(Uint32 val)
+void EcrireRegistreSP(Uint32 val)
{
- registre[REG_PUSHPOP] = val;
+ registre[REG_STACKPTR] = val;
}
/* Lit le mot qui se trouve dans le registre 'numero_registre' */
@@ -171,3 +171,11 @@ void ResetParity(void)
{
registre[REG_FLAG] &= (VAL_MAX - 8);
}
+
+
+void ResetRegistres(void)
+{ int i;
+
+ for (i=0; i<NB_REGISTRES_PHYSIQUES;i++)
+ registre[i]=0;
+} \ No newline at end of file
diff --git a/lib/simulator.c b/lib/simulator.c
index d1e5c7f..4373d0d 100644
--- a/lib/simulator.c
+++ b/lib/simulator.c
@@ -17,7 +17,6 @@
-// a modifier : Adresse switch 0 c faux
// CALL RET ???
// verifier le reste
@@ -37,32 +36,39 @@ void IncrementeCompteurOrdinal(void)
Uint32 Adresse(Uint32 u, Uint32 instruction)
{
+ Uint32 tmp;
+
switch (champ(u, 2)) {
case 0:
- return (LireRegistre(Champ3(instruction))); /* directement registre A CORRIGER */
+ exception(1, _("Adresse: Call With Invalid r/m Field State ( r/m=00 )"));
+ return(0);
case 1:
+ tmp = LireInstruction();
IncrementeCompteurOrdinal();
- return (LireInstruction());
+ return (tmp);
case 2:
return (LireRegistre(Champ3(instruction))); /* Adresse dans registre */
case 3:
+ tmp = LireRegistre(Champ3(instruction)) + LireInstruction(); /* Adresse dans registre + decalage de nouvelle instruction */
IncrementeCompteurOrdinal();
- return (LireRegistre(Champ3(instruction)) + LireInstruction()); /* Adresse dans registre + decalage de nouvelle instruction */
+ return (tmp);
default:
exception(1, _("Adresse: Unmatched Addr Field"));
+ return(0);
}
}
+
void Initialisation(void)
{
int i;
for (i = 0; i < TAILLE_MEMOIRE; i++)
Reset(&memoire_principale[i]);
- EcrireRegistrePP(ADD_PP);
+ EcrireRegistreSP(ADD_SP);
}
-void Decode(Uint32 instruction)
+void DecodeExec(Uint32 instruction, Uint32 entrypoint)
{
Uint32 champ_registre_resultat, val1, val2, resultat;
@@ -77,8 +83,8 @@ void Decode(Uint32 instruction)
if (ValeurBit(Extension(instruction), 0) == 0)
val2 = LireRegistre(Champ3(instruction)); /* Deuxième entier, stocké dans un registre, qui va etre utilisé dans l'opération */
else {
- IncrementeCompteurOrdinal();
val2 = LireInstruction(); /* Deuxième entier, stocké après l'instruction, qui va etre utilisé dans l'opération */
+ IncrementeCompteurOrdinal();
}
if (ValeurBit(Extension(instruction), 1) == 0) /* Teste si l'opération est signée ou pas */
switch (Opcode(instruction)) {
@@ -152,7 +158,7 @@ void Decode(Uint32 instruction)
case 3:
if (Parity() == 1)
goto fin;
- }
+ }
} else { /* Negation du test */
switch (champ(Extension(instruction) >> 2, 4)) { /* teste les bits 2 et 3 */
case 0:
@@ -171,16 +177,14 @@ void Decode(Uint32 instruction)
}
}
/* Pas de MOV conditionnel */
- if (ValeurBit(Extension(instruction), 1) == 0) {/* Mov arg1 arg2 */
- if (ValeurBit(Extension(instruction), 0) == 0) {/* arg2 = reg */
- if (champ(Champ1(instruction), 2) == 0) {/* r/m de arg1 = 0 */
- EcrireRegistre(Champ3(instruction),
- LireRegistre(Champ2(instruction)));
+ if (ValeurBit(Extension(instruction), 1) == 0) { /* Mov arg1 arg2 */
+ if (ValeurBit(Extension(instruction), 0) == 0) { /* arg2 = reg */
+ if (champ(Champ1(instruction), 2) == 0) { /* r/m de arg1 = 0 */
+ EcrireRegistre(Champ3(instruction), LireRegistre(Champ2(instruction)));
} else {
- ST(Adresse(Champ1(instruction), instruction),
- LireRegistre(Champ2(instruction)));
- }
- } else {/* arg2 = imm32 */
+ ST(Adresse(Champ1(instruction), instruction), LireRegistre(Champ2(instruction)));
+ }
+ } else { /* arg2 = imm32 */
if (champ(Champ1(instruction), 2) == 0) { /* r/m de arg1 = 0 */
EcrireRegistre(Champ3(instruction), LireInstruction());
IncrementeCompteurOrdinal();
@@ -188,114 +192,170 @@ void Decode(Uint32 instruction)
ST(Adresse(Champ1(instruction), instruction), LireInstruction());
IncrementeCompteurOrdinal();
}
- }
- } else {
- if (ValeurBit(Extension(instruction), 0) == 0) {/* arg2 = reg */
- if (champ(Champ1(instruction), 2) == 0) {/* r/m de arg1 = 0 */
+ }
+ } else {
+ if (ValeurBit(Extension(instruction), 0) == 0) { /* arg2 = reg */
+ if (champ(Champ1(instruction), 2) == 0) { /* r/m de arg1 = 0 */
EcrireRegistre(Champ2(instruction), LireRegistre(Champ3(instruction)));
-
+
} else {
- EcrireRegistre(Champ2(instruction),
- LD(Adresse(Champ1(instruction), instruction)));
- }
- } else {/* arg2 = imm32 */
- exception(1,_("MOV: Memory to Memory Forbidden On This Type Of Processor"));
- }
+ EcrireRegistre(Champ2(instruction), LD(Adresse(Champ1(instruction), instruction)));
+ }
+ } else { /* arg2 = imm32 */
+ exception(1, _("MOV: Memory to Memory Forbidden On This Type Of Processor"));
+ }
}
fin:
- break;
- }
- case 9: { /* NOP */
- /* Instruction nulle */
- break;
- }
- case 10: /* J */
- case 11: {
- int test1, test2;
+ break;
+ }
+ case 9:{ /* NOP */
+ /* Instruction nulle */
+ break;
+ }
+ case 10: /* J[cond] */
+ case 11:{
+ int test1, test2;
- switch (champ(Extension(instruction), 4)) {
- case 0:
- test1 =
- LireRegistre(Champ1(instruction)) ==
- LireRegistre(Champ2(instruction)); break; case 1:
- test1 =
- LireRegistre(Champ1(instruction)) !=
- LireRegistre(Champ2(instruction)); break; case 2:
- test1 =
- LireRegistre(Champ1(instruction)) <
- LireRegistre(Champ2(instruction)); break; case 3:
- test1 =
- LireRegistre(Champ1(instruction)) <=
- LireRegistre(Champ2(instruction)); break;}
- switch (champ(Extension(instruction) >> 2, 4)) {
- case 0:
- test2 = Overflow(); break; case 1:
- test2 = Zero(); break; case 2:
- test2 = Sign(); break; case 3:
- test2 = Parity(); break;}
- switch (champ(Extension(instruction) >> 4, 4)) {
- case 0:
- test1 = test1; break; case 1:
- test1 = test1 || test2; break; case 2:
- test1 = test1 && !test2; break; case 3:
- test1 = test1 || !test2; break;}
- if (test1) {
- IncrementeCompteurOrdinal();
- if (Opcode(instruction) ==
- 10) EcrireRegistrePC(LireInstruction());
- else
- EcrireRegistrePC(AdditionNonSigne
- (LireRegistrePC(), LireInstruction()));}
- break;}
- case (12): /* JMP *//* Kris Kross */
+ switch (champ(Extension(instruction), 4)) {
+ case 0:
+ if (Champ1(instruction) == Champ2(instruction)) {
+ test1 = 1;
+ } else {
+ test1 = LireRegistre(Champ1(instruction)) == LireRegistre(Champ2(instruction));
+ }
+ break;
+ case 1:
+ test1 = LireRegistre(Champ1(instruction)) != LireRegistre(Champ2(instruction));
+ break;
+ case 2:
+ test1 = LireRegistre(Champ1(instruction)) < LireRegistre(Champ2(instruction));
+ break;
+ case 3:
+ test1 = LireRegistre(Champ1(instruction)) <= LireRegistre(Champ2(instruction));
+ break;
+ }
+ switch (champ(Extension(instruction) >> 2, 4)) {
+ case 0:
+ test2 = Overflow();
+ break;
+ case 1:
+ test2 = Zero();
+ break;
+ case 2:
+ test2 = Sign();
+ break;
+ case 3:
+ test2 = Parity();
+ break;
+ }
+ switch (champ(Extension(instruction) >> 4, 4)) {
+ case 0:
+ test1 = test1;
+ break;
+ case 1:
+ test1 = test1 || test2;
+ break;
+ case 2:
+ test1 = test1 && !test2;
+ break;
+ case 3:
+ test1 = test1 || !test2;
+ break;
+ }
+ if (test1) { Uint32 tmp;
+ tmp=LireInstruction();
+ EcrireRegistrePC(tmp);
+ }
+ break;
+ }
+ case (12): /* JMP */
case (13):
- if (ValeurBit(Extension(instruction), 0) == 0) {
- ; /* RET */
- }
- else
- if (ValeurBit(Extension(instruction), 1) == 0); /* JMP */
- else; /* CALL */
- break; case 14: { /* PUSH */
- Uint32 val; /* valeur qui va etre stockée */
- EcrireRegistrePP(SoustractionNonSigne(LireRegistrePP(), 1)); /* On pointe sur un emplacement vide */
- if (ValeurBit(Extension(instruction), 0) == 0)
- val = LireRegistre(Champ1(instruction));
- else {
- IncrementeCompteurOrdinal(); val = LireInstruction();}
- ST(LireRegistrePP(), val); break;}
- case 15: { /* POP */
- EcrireRegistre(Champ1(instruction), LireRegistrePP());
- EcrireRegistrePP(AdditionNonSigne(LireRegistrePP(), 1));
- break;}
- case 127: { /* HALT-RESET */
- if (ValeurBit(Extension(instruction), 0))
- getc(stdin); /* Halt */
- else
- Initialisation(); /* Reset */
- break;}
- default: {
- printf("soja");}
- }
- }
- }
- void Traitement(void) {
- Uint32 instruction; while (!0) {
- instruction = LireInstruction();
- Decode(instruction); IncrementeCompteurOrdinal();}
- }
+ if (ValeurBit(Extension(instruction), 0) == 0) {
+ /* RET */
+ EcrireRegistreSP(AdditionNonSigne(LireRegistreSP(),Champ1(instruction)));
+ EcrireRegistreSP(AdditionNonSigne(LireRegistreSP(), 1));
+ EcrireRegistrePC(LD(LireRegistreSP()));
+
+ } else if (ValeurBit(Extension(instruction), 1) == 0) { /* JMP */
+ if (ValeurBit(Extension(instruction), 2) == 0) {
+ EcrireRegistrePC(LireRegistre(Champ1(instruction)));
+ } else {
+ EcrireRegistrePC(LireInstruction());
+ }
+ } else { /* CALL */
+ ST(LireRegistreSP(),LireRegistrePC());
+ EcrireRegistreSP(SoustractionNonSigne(LireRegistreSP(),1));
+ if (ValeurBit(Extension(instruction), 2) == 0) {
+ EcrireRegistrePC(LireRegistre(Champ1(instruction)));
+ } else {
+ EcrireRegistrePC(LireInstruction());
+ }
+ }
+ break;
+ case 14:{ /* PUSH */
+ Uint32 val; /* valeur qui va etre stockée */
- void AfficheReg(void) // affiche reg
- {
- int i, j; for (i = 0; i <= 3; i++) {
- for (j = 1; j <= 8; j++) {
- printf(" R%02d ", (i * 8 + j));}
- printf("\n"); for (j = 1; j <= 8; j++) {
- printf("%08lX ", (registre[i * 8 + j - 1]));}
- printf("\n");}
- printf
- ("Rg: %08lX | Rd: %08lX | Flag: %08lX | PC: %08lX\n",
- LireRegistreRG(), LireRegistreRD(), LireRegistreFLAG(),
- registre[REG_PC]); printf("\n");}
+ if (ValeurBit(Extension(instruction), 0) == 0)
+ val = LireRegistre(Champ1(instruction));
+ else {
+ val = LireInstruction();
+ IncrementeCompteurOrdinal();
+ }
+ ST(LireRegistreSP(), val);
+ EcrireRegistreSP(SoustractionNonSigne(LireRegistreSP(), 1));
+ break;
+ }
+ case 15:{ /* POP */
+ EcrireRegistreSP(AdditionNonSigne(LireRegistreSP(), 1));
+ EcrireRegistre(Champ1(instruction), LD(LireRegistreSP()));
+
+ break;
+ }
+ case 127:{ /* HALT-RESET */
+ if (ValeurBit(Extension(instruction), 0))
+ exit(0); /* Halt *//* *******************FIXMI********************* */
+ else
+ ResetRegistres();
+ Traitement(entrypoint); /* Reset *//* ************FIXMI************** */
+ break;
+ }
+ default:{
+ exception(1, _("DecodeExec: Invalid Opcode"));
+ }
+ }
+ }
+}
+void Traitement(Uint32 entrypoint)
+{ /* ******************** FIXMI ************************* */
+ Uint32 instruction;
+
+ EcrireRegistrePC(entrypoint);
+ while (!0) {
+ instruction = LireInstruction();
+ IncrementeCompteurOrdinal();
+ DecodeExec(instruction, entrypoint);
+ }
+}
+
+void AfficheReg(void) // affiche reg
+{
+ int i, j;
+
+ for (i = 0; i <= 3; i++) {
+ for (j = 1; j <= 8; j++) {
+ printf(" R%02d ", (i * 8 + j));
+ }
+ printf("\n");
+ for (j = 1; j <= 8; j++) {
+ printf("%08lX ", (registre[i * 8 + j - 1]));
+ }
+ printf("\n");
+ }
+ printf("Rg: %08lX | Rd: %08lX | Flag: %08lX | PC: %08lX\n", LireRegistreRG(), LireRegistreRD(), LireRegistreFLAG(), registre[REG_PC]);
+ printf("\n");
+}
- void Debogueur(void) {
- AfficheReg();}
+void Debogueur(void)
+{
+ AfficheReg();
+}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 17:47:49 +0000