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-rw-r--r--lib/simulator.c279
1 files changed, 129 insertions, 150 deletions
diff --git a/lib/simulator.c b/lib/simulator.c
index 2bed0b7..d1e5c7f 100644
--- a/lib/simulator.c
+++ b/lib/simulator.c
@@ -48,8 +48,8 @@ Uint32 Adresse(Uint32 u, Uint32 instruction)
case 3:
IncrementeCompteurOrdinal();
return (LireRegistre(Champ3(instruction)) + LireInstruction()); /* Adresse dans registre + decalage de nouvelle instruction */
- default:
- exception(1,_("Adresse: Unmatched Addr Field"));
+ default:
+ exception(1, _("Adresse: Unmatched Addr Field"));
}
}
@@ -137,8 +137,8 @@ void Decode(Uint32 instruction)
break;
}
case 8:{ /* MOV */
- if (ValeurBit(Extension(instruction), 4) == 1) /* MOV conditionnel */
- if (ValeurBit(Extension(instruction), 5) == 0) /* Test normal */
+ if (ValeurBit(Extension(instruction), 4) == 1) { /* MOV conditionnel */
+ if (ValeurBit(Extension(instruction), 5) == 0) { /* Test normal */
switch (champ(Extension(instruction) >> 2, 4)) { /* teste les bits 2 et 3 */
case 0:
if (Overflow() == 1)
@@ -152,7 +152,8 @@ void Decode(Uint32 instruction)
case 3:
if (Parity() == 1)
goto fin;
- } else /* Negation du test */
+ }
+ } else { /* Negation du test */
switch (champ(Extension(instruction) >> 2, 4)) { /* teste les bits 2 et 3 */
case 0:
if (Overflow() == 0)
@@ -167,156 +168,134 @@ void Decode(Uint32 instruction)
if (Parity() == 0)
goto fin;
}
+ }
+ }
/* Pas de MOV conditionnel */
- if (ValeurBit(Extension(instruction), 1) == 0) /* Mov arg1 arg2 */
- if (ValeurBit(Extension(instruction), 0) == 0) /* arg2 = reg */
- EcrireRegistre(Champ1(instruction), LireRegistre(Champ2(instruction)));
- else /* arg2 = imm32 */ if (champ(Champ2(instruction), 4) == 0)
- EcrireRegistre(Champ1(instruction),
- Adresse(Champ2(instruction), instruction));
- else
- EcrireRegistre(Champ1(instruction),
- LD(Adresse(Champ2(instruction), instruction)));
- else /* Mov arg2 arg1 */ if (ValeurBit(Extension(instruction), 0) == 0) /* arg2 = reg */
- EcrireRegistre(Champ2(instruction), LireRegistre(Champ1(instruction)));
- else /* arg1 = imm32 */ if (champ(Champ2(instruction), 4) == 0)
- ST(Adresse(Champ2(instruction), instruction),
- LireRegistre(Champ1(instruction)));
- else
- ST(Adresse(Champ2(instruction), instruction),
- LireRegistre(Champ1(instruction)));
+ if (ValeurBit(Extension(instruction), 1) == 0) {/* Mov arg1 arg2 */
+ if (ValeurBit(Extension(instruction), 0) == 0) {/* arg2 = reg */
+ if (champ(Champ1(instruction), 2) == 0) {/* r/m de arg1 = 0 */
+ EcrireRegistre(Champ3(instruction),
+ LireRegistre(Champ2(instruction)));
+ } else {
+ ST(Adresse(Champ1(instruction), instruction),
+ LireRegistre(Champ2(instruction)));
+ }
+ } else {/* arg2 = imm32 */
+ if (champ(Champ1(instruction), 2) == 0) { /* r/m de arg1 = 0 */
+ EcrireRegistre(Champ3(instruction), LireInstruction());
+ IncrementeCompteurOrdinal();
+ } else {
+ ST(Adresse(Champ1(instruction), instruction), LireInstruction());
+ IncrementeCompteurOrdinal();
+ }
+ }
+ } else {
+ if (ValeurBit(Extension(instruction), 0) == 0) {/* arg2 = reg */
+ if (champ(Champ1(instruction), 2) == 0) {/* r/m de arg1 = 0 */
+ EcrireRegistre(Champ2(instruction), LireRegistre(Champ3(instruction)));
+
+ } else {
+ EcrireRegistre(Champ2(instruction),
+ LD(Adresse(Champ1(instruction), instruction)));
+ }
+ } else {/* arg2 = imm32 */
+ exception(1,_("MOV: Memory to Memory Forbidden On This Type Of Processor"));
+ }
+ }
fin:
- break;
- }
- case 9:{ /* NOP */
- /* Instruction nulle */
- break;
- }
+ break;
+ }
+ case 9: { /* NOP */
+ /* Instruction nulle */
+ break;
+ }
case 10: /* J */
- case 11:{
- int test1, test2;
+ case 11: {
+ int test1, test2;
- switch (champ(Extension(instruction), 4)) {
- case 0:
- test1 = LireRegistre(Champ1(instruction)) == LireRegistre(Champ2(instruction));
- break;
- case 1:
- test1 = LireRegistre(Champ1(instruction)) != LireRegistre(Champ2(instruction));
- break;
- case 2:
- test1 = LireRegistre(Champ1(instruction)) < LireRegistre(Champ2(instruction));
- break;
- case 3:
- test1 = LireRegistre(Champ1(instruction)) <= LireRegistre(Champ2(instruction));
- break;
- }
- switch (champ(Extension(instruction) >> 2, 4)) {
- case 0:
- test2 = Overflow();
- break;
- case 1:
- test2 = Zero();
- break;
- case 2:
- test2 = Sign();
- break;
- case 3:
- test2 = Parity();
- break;
- }
- switch (champ(Extension(instruction) >> 4, 4)) {
- case 0:
- test1 = test1;
- break;
- case 1:
- test1 = test1 || test2;
- break;
- case 2:
- test1 = test1 && !test2;
- break;
- case 3:
- test1 = test1 || !test2;
- break;
- }
- if (test1) {
- IncrementeCompteurOrdinal();
- if (Opcode(instruction) == 10)
- EcrireRegistrePC(LireInstruction());
- else
- EcrireRegistrePC(AdditionNonSigne(LireRegistrePC(), LireInstruction()));
- }
- break;
- }
+ switch (champ(Extension(instruction), 4)) {
+ case 0:
+ test1 =
+ LireRegistre(Champ1(instruction)) ==
+ LireRegistre(Champ2(instruction)); break; case 1:
+ test1 =
+ LireRegistre(Champ1(instruction)) !=
+ LireRegistre(Champ2(instruction)); break; case 2:
+ test1 =
+ LireRegistre(Champ1(instruction)) <
+ LireRegistre(Champ2(instruction)); break; case 3:
+ test1 =
+ LireRegistre(Champ1(instruction)) <=
+ LireRegistre(Champ2(instruction)); break;}
+ switch (champ(Extension(instruction) >> 2, 4)) {
+ case 0:
+ test2 = Overflow(); break; case 1:
+ test2 = Zero(); break; case 2:
+ test2 = Sign(); break; case 3:
+ test2 = Parity(); break;}
+ switch (champ(Extension(instruction) >> 4, 4)) {
+ case 0:
+ test1 = test1; break; case 1:
+ test1 = test1 || test2; break; case 2:
+ test1 = test1 && !test2; break; case 3:
+ test1 = test1 || !test2; break;}
+ if (test1) {
+ IncrementeCompteurOrdinal();
+ if (Opcode(instruction) ==
+ 10) EcrireRegistrePC(LireInstruction());
+ else
+ EcrireRegistrePC(AdditionNonSigne
+ (LireRegistrePC(), LireInstruction()));}
+ break;}
case (12): /* JMP *//* Kris Kross */
case (13):
- if (ValeurBit(Extension(instruction), 0) == 0) {
- ; /* RET */
- } else if (ValeurBit(Extension(instruction), 1) == 0) ; /* JMP */
- else; /* CALL */
-
- break;
- case 14:{ /* PUSH */
- Uint32 val; /* valeur qui va etre stockée */
-
- EcrireRegistrePP(SoustractionNonSigne(LireRegistrePP(), 1)); /* On pointe sur un emplacement vide */
- if (ValeurBit(Extension(instruction), 0) == 0)
- val = LireRegistre(Champ1(instruction));
- else {
- IncrementeCompteurOrdinal();
- val = LireInstruction();
- }
- ST(LireRegistrePP(), val);
- break;
- }
- case 15:{ /* POP */
- EcrireRegistre(Champ1(instruction), LireRegistrePP());
- EcrireRegistrePP(AdditionNonSigne(LireRegistrePP(), 1));
- break;
- }
- case 127:{ /* HALT-RESET */
- if (ValeurBit(Extension(instruction), 0))
- getc(stdin); /* Halt */
- else
- Initialisation(); /* Reset */
- break;
- }
- default:{
- printf("soja");
- }
- }
- }
-}
-void Traitement(void)
-{
- Uint32 instruction;
-
- while (!0) {
- instruction = LireInstruction();
- Decode(instruction);
- IncrementeCompteurOrdinal();
- }
-}
-
-void AfficheReg(void) // affiche reg
-{
- int i,j;
-
- for (i=0; i<=3; i++) {
- for (j=1; j<=8;j++) {
- printf(" R%02d ", (i*8+j));
- }
- printf("\n");
- for (j=1; j<=8;j++) {
- printf("%08lX ", (registre[i*8+j-1]));
- }
- printf("\n");
-
- }
- printf("Rg: %08lX | Rd: %08lX | Flag: %08lX | PC: %08lX\n", LireRegistreRG(), LireRegistreRD(), LireRegistreFLAG(),registre[REG_PC]);
- printf("\n");
-}
+ if (ValeurBit(Extension(instruction), 0) == 0) {
+ ; /* RET */
+ }
+ else
+ if (ValeurBit(Extension(instruction), 1) == 0); /* JMP */
+ else; /* CALL */
+ break; case 14: { /* PUSH */
+ Uint32 val; /* valeur qui va etre stockée */
+ EcrireRegistrePP(SoustractionNonSigne(LireRegistrePP(), 1)); /* On pointe sur un emplacement vide */
+ if (ValeurBit(Extension(instruction), 0) == 0)
+ val = LireRegistre(Champ1(instruction));
+ else {
+ IncrementeCompteurOrdinal(); val = LireInstruction();}
+ ST(LireRegistrePP(), val); break;}
+ case 15: { /* POP */
+ EcrireRegistre(Champ1(instruction), LireRegistrePP());
+ EcrireRegistrePP(AdditionNonSigne(LireRegistrePP(), 1));
+ break;}
+ case 127: { /* HALT-RESET */
+ if (ValeurBit(Extension(instruction), 0))
+ getc(stdin); /* Halt */
+ else
+ Initialisation(); /* Reset */
+ break;}
+ default: {
+ printf("soja");}
+ }
+ }
+ }
+ void Traitement(void) {
+ Uint32 instruction; while (!0) {
+ instruction = LireInstruction();
+ Decode(instruction); IncrementeCompteurOrdinal();}
+ }
-void Debogueur(void) {
-AfficheReg();
+ void AfficheReg(void) // affiche reg
+ {
+ int i, j; for (i = 0; i <= 3; i++) {
+ for (j = 1; j <= 8; j++) {
+ printf(" R%02d ", (i * 8 + j));}
+ printf("\n"); for (j = 1; j <= 8; j++) {
+ printf("%08lX ", (registre[i * 8 + j - 1]));}
+ printf("\n");}
+ printf
+ ("Rg: %08lX | Rd: %08lX | Flag: %08lX | PC: %08lX\n",
+ LireRegistreRG(), LireRegistreRD(), LireRegistreFLAG(),
+ registre[REG_PC]); printf("\n");}
-} \ No newline at end of file
+ void Debogueur(void) {
+ AfficheReg();}
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