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module piodev1(
input nIN_CH,
output nCS_CH,
inout [0:7] D,
output A20_SRAM,
output nCS_SRAM,
input nRD,
input nWR,
input CLK,
output nCS_SW,
output WR_LEDS,
input SWRESET,
inout GPIO,
input RECOVERY,
output nIN10,
input nCS0,
input nCS2,
output SBEN,
inout [0:7] PD,
input A0,
input A1,
input A2,
input A3,
input A20,
input A21,
input A22,
output A20_FLASH,
output nCS_FLASH,
output nCS_PORTA,
output nCS_PORTB,
output A0_PORTA,
output nRST_FT,
input NRST
);
wire CS0 = !nCS0;
wire CS2 = !nCS2;
wire CS_FLASH = CS2;
wire CS_PORTA = CS0;
assign nCS_FLASH = !CS_FLASH;
assign nCS_PORTA = !CS_PORTA;
assign SBEN = 1'b1;
assign A20_FLASH = A20;
assign A0_PORTA = 1'b0;
assign nCS_PORTB = 1'b1;
assign nRST_FT = 1'b1;
reg PDtoD = 1'b0;
reg [7:0] buffer = 0;
wire activateOutput = CS0 | CS2;
always @(negedge nWR or negedge nRD) begin
if (!nWR) begin
PDtoD <= 1'b0;
end
if (!nRD) begin
PDtoD <= 1'b1;
end
end
always @(posedge nWR or posedge nRD) begin
if (nWR) begin
buffer <= D;
end
if (nRD) begin
buffer <= PD;
end
end
assign D = (PDtoD && activateOutput) ? buffer : 8'bzzzzzzzz;
assign PD = !PDtoD ? buffer : 8'bzzzzzzzz;
endmodule
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