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authorPixel <pixel@nobis-crew.org>2011-01-26 23:50:29 -0800
committerPixel <pixel@nobis-crew.org>2011-01-26 23:50:29 -0800
commit03638eaea432ac06456cded2cb743d20664689a7 (patch)
treea40478f4f6fb0fbbabe7fe32e7f07cb34c7dde4d /arch/arm
parentc08bb737198dc1beac552af363646c307094d731 (diff)
More senseful init sequence, and memory alignment.
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/lpc17xx/ldscript7
-rw-r--r--arch/arm/lpc17xx/startup.s10
2 files changed, 7 insertions, 10 deletions
diff --git a/arch/arm/lpc17xx/ldscript b/arch/arm/lpc17xx/ldscript
index 677d063..14fe819 100644
--- a/arch/arm/lpc17xx/ldscript
+++ b/arch/arm/lpc17xx/ldscript
@@ -172,23 +172,24 @@ SECTIONS
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
*(.ram)
- . = ALIGN (8);
+ . = ALIGN (32);
_edata = .;
} >ram AT>rom
.data_end :
{
- . = ALIGN(8);
+ . = ALIGN(32);
__rom_data_end = .;
} > rom
.bss :
{
+ . = ALIGN(32);
__bss_ram_begin = .;
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
*(.ram.b)
- . = ALIGN (8);
+ . = ALIGN(32);
__bss_ram_end = .;
_end = .;
__end = .;
diff --git a/arch/arm/lpc17xx/startup.s b/arch/arm/lpc17xx/startup.s
index c09971e..a57954a 100644
--- a/arch/arm/lpc17xx/startup.s
+++ b/arch/arm/lpc17xx/startup.s
@@ -145,13 +145,9 @@ __cs3_reset_cortex_m:
LDR R2, =__bss_ram_len
BL memset
- LDR R0, =lpc17xx_deinit_all
- BLX R0
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0,=_start
- BX R0
+ BL lpc17xx_deinit_all
+ BL SystemInit
+ B _start
.pool
.cantunwind
.fnend