diff options
author | Nicolas "Pixel" Noble <pixel@nobis-crew.org> | 2011-01-27 02:01:44 +0100 |
---|---|---|
committer | Nicolas "Pixel" Noble <pixel@nobis-crew.org> | 2011-01-27 02:01:44 +0100 |
commit | ee97e7d3e576b653ef6694b7f3bcae9045620cca (patch) | |
tree | 25e682a10c6b3c61a0dc483bf9c3c6e7a20e5ea2 /arch/arm | |
parent | 30306a42972f6a414e8b23e7942fd77f74af80db (diff) |
Adding slightly better exception handlers.
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/lpc17xx/handlers.c | 50 | ||||
-rw-r--r-- | arch/arm/lpc17xx/startup.s | 30 |
2 files changed, 50 insertions, 30 deletions
diff --git a/arch/arm/lpc17xx/handlers.c b/arch/arm/lpc17xx/handlers.c new file mode 100644 index 0000000..444c0c1 --- /dev/null +++ b/arch/arm/lpc17xx/handlers.c @@ -0,0 +1,50 @@ +#include <osdebug.h> +#include "LPC17xx.h" + +enum FaultType { + NMI, HardFault, MemManage, BusFault, UsageFault, +}; + +static inline void traceme() { + unsigned int i; + void * frame, * pc; + + i = 0; + frame = __builtin_frame_address(i); + pc = frame ? __builtin_return_address(i) : 0; + DBGOUT("lv%u; PC = %p, frame = %p\r\n", i, pc, frame); +} + +static int general_Handler(enum FaultType fault) { + DBGOUT("***FAULT***\r\n"); + + traceme(); + + switch (fault) { + case NMI: + DBGOUT("NMI\r\n"); + break; + case HardFault: + DBGOUT("HardFault\r\nHFSR: %p\r\n", SCB->HFSR); + break; + case MemManage: + DBGOUT("MemManage\r\nCSFR: %p\r\nMMFAR: %p\r\n", SCB->CFSR, SCB->MMFAR); + break; + case BusFault: + DBGOUT("BusFault\r\nCFSR: %p\r\nBFAR: %p\r\n", SCB->CFSR, SCB->BFAR); + break; + case UsageFault: + DBGOUT("UsageFault\r\nCFSR: %p\r\nBFAR: %p\r\n", SCB->CFSR, SCB->BFAR); + break; + } + + while(1); + + return 0; +} + +int NMI_Handler() { return general_Handler(NMI); } +int HardFault_Handler() { return general_Handler(HardFault); } +int MemManage_Handler() { return general_Handler(MemManage); } +int BusFault_Handler() { return general_Handler(BusFault); } +int UsageFault_Handler() { return general_Handler(UsageFault); } diff --git a/arch/arm/lpc17xx/startup.s b/arch/arm/lpc17xx/startup.s index 6aced2c..6f41389 100644 --- a/arch/arm/lpc17xx/startup.s +++ b/arch/arm/lpc17xx/startup.s @@ -158,36 +158,6 @@ __cs3_reset_cortex_m: /* Exception Handlers */ - .weak NMI_Handler - .type NMI_Handler, %function -NMI_Handler: - B . - .size NMI_Handler, . - NMI_Handler - - .weak HardFault_Handler - .type HardFault_Handler, %function -HardFault_Handler: - B . - .size HardFault_Handler, . - HardFault_Handler - - .weak MemManage_Handler - .type MemManage_Handler, %function -MemManage_Handler: - B . - .size MemManage_Handler, . - MemManage_Handler - - .weak BusFault_Handler - .type BusFault_Handler, %function -BusFault_Handler: - B . - .size BusFault_Handler, . - BusFault_Handler - - .weak UsageFault_Handler - .type UsageFault_Handler, %function -UsageFault_Handler: - B . - .size UsageFault_Handler, . - UsageFault_Handler - .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: |