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-rw-r--r--Makefile7
-rw-r--r--arch/arm/lpc17xx/startup.s13
-rw-r--r--target-rules.mk2
3 files changed, 20 insertions, 2 deletions
diff --git a/Makefile b/Makefile
index 61db0a1..77c485d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,6 @@
TARGET = demo.bin
-LIBS = -Wl,--start-group -lc FreeRTOS/libFreeRTOS.a arch/libarch.a os/libos.a -Wl,--end-group
+LIBDEPS = FreeRTOS/libFreeRTOS.a arch/libarch.a os/libos.a
+LIBS = -Wl,--start-group -lc $(LIBDEPS) -Wl,--end-group
export ROOTDIR = $(CURDIR)
@@ -14,6 +15,10 @@ clean: clean-generic
.PHONY: libs FreeRTOS arch os
+FreeRTOS/libFreeRTOS.a: libs
+arch/libarch.a: libs
+os/libos.a: libs
+
libs: FreeRTOS arch os
FreeRTOS:
diff --git a/arch/arm/lpc17xx/startup.s b/arch/arm/lpc17xx/startup.s
index ff58b7b..47a2bdf 100644
--- a/arch/arm/lpc17xx/startup.s
+++ b/arch/arm/lpc17xx/startup.s
@@ -9,6 +9,9 @@
//*** <<< Use Configuration Wizard in Context Menu >>> ***
*/
+ .cpu cortex-m3
+ .syntax unified
+
/*
// <h> Stack Configuration
@@ -125,6 +128,16 @@ __cs3_interrupt_vector_cortex_m:
.type __cs3_reset_cortex_m, %function
__cs3_reset_cortex_m:
.fnstart
+ LDR R0, =__rom_data_begin
+ LDR R1, =__rom_data_end
+ LDR R2, =__ram_data_begin
+ B rom_to_ram_copy_check
+rom_to_ram_copy_loop:
+ LDR R3, [R0], #4
+ STR R3, [R2], #4
+rom_to_ram_copy_check:
+ CMP R1, R0
+ BCC rom_to_ram_copy_loop
LDR R0, =SystemInit
BLX R0
LDR R0,=_start
diff --git a/target-rules.mk b/target-rules.mk
index 29eee1f..1edcc7a 100644
--- a/target-rules.mk
+++ b/target-rules.mk
@@ -15,7 +15,7 @@ TARGET_MAP = $(addsuffix .map, $(basename $(TARGET)))
TARGET_OBJS += $(addsuffix .o, $(basename $(TARGET)))
endif
-$(TARGET_ELF): $(TARGET_OBJS)
+$(TARGET_ELF): $(TARGET_OBJS) $(LIBDEPS)
$(E) "[TL] Linking $@"
$(Q)$(TARGET_LD) -Wl,--gc-sections -Wl,-O3 -Wl,-Map=$(TARGET_MAP) -o $@ $^ -T$(LDSCRIPT) $(LIBS)