diff options
| author | Nicolas "Pixel" Noble <pixel@nobis-crew.org> | 2011-01-27 02:36:10 +0100 |
|---|---|---|
| committer | Nicolas "Pixel" Noble <pixel@nobis-crew.org> | 2011-01-27 02:36:10 +0100 |
| commit | d8730c7de5cdb4117b0ca6c6f63eaad276aa2ab2 (patch) | |
| tree | d74b2b70da5114223aa8b5008371e366f0b746db /arch/arm | |
| parent | ee97e7d3e576b653ef6694b7f3bcae9045620cca (diff) | |
Trying a better reset sequence, by de-initting all possible devices.
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/lpc17xx/deinit-all.c | 45 | ||||
| -rw-r--r-- | arch/arm/lpc17xx/startup.s | 3 |
2 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/lpc17xx/deinit-all.c b/arch/arm/lpc17xx/deinit-all.c new file mode 100644 index 0000000..8a75229 --- /dev/null +++ b/arch/arm/lpc17xx/deinit-all.c @@ -0,0 +1,45 @@ +#include "LPC17xx.h" +#include "lpc17xx_adc.h" +#include "lpc17xx_can.h" +#include "lpc17xx_emac.h" +#include "lpc17xx_exti.h" +#include "lpc17xx_i2c.h" +#include "lpc17xx_i2s.h" +#include "lpc17xx_nvic.h" +#include "lpc17xx_pwm.h" +#include "lpc17xx_qei.h" +#include "lpc17xx_rit.h" +#include "lpc17xx_rtc.h" +#include "lpc17xx_spi.h" +#include "lpc17xx_ssp.h" +#include "lpc17xx_timer.h" +#include "lpc17xx_uart.h" + +void lpc17xx_deinit_all() { +//** ADC_DeInit(LPC_ADC); + CAN_DeInit(LPC_CAN1); + CAN_DeInit(LPC_CAN2); + EMAC_DeInit(); + EXTI_DeInit(); + I2C_DeInit(LPC_I2C0); + I2C_DeInit(LPC_I2C1); + I2C_DeInit(LPC_I2C2); + I2S_DeInit(LPC_I2S); + NVIC_DeInit(); + NVIC_SCBDeInit(); + PWM_DeInit(LPC_PWM1); + QEI_DeInit(LPC_QEI); +//** RIT_DeInit(LPC_RIT); + RTC_DeInit(LPC_RTC); + SPI_DeInit(LPC_SPI); + SSP_DeInit(LPC_SSP0); + SSP_DeInit(LPC_SSP1); + UART_DeInit(LPC_UART0); + UART_DeInit((LPC_UART_TypeDef *) LPC_UART1); +//** UART_DeInit(LPC_UART2); +//** UART_DeInit(LPC_UART3); + TIM_DeInit(LPC_TIM0); + TIM_DeInit(LPC_TIM1); +//** TIM_DeInit(LPC_TIM2); +//** TIM_DeInit(LPC_TIM3); +} diff --git a/arch/arm/lpc17xx/startup.s b/arch/arm/lpc17xx/startup.s index 6f41389..c09971e 100644 --- a/arch/arm/lpc17xx/startup.s +++ b/arch/arm/lpc17xx/startup.s @@ -145,6 +145,9 @@ __cs3_reset_cortex_m: LDR R2, =__bss_ram_len BL memset + LDR R0, =lpc17xx_deinit_all + BLX R0 + LDR R0, =SystemInit BLX R0 LDR R0,=_start |